-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 17:31:33 2024 UTC
-- File 20240401_081842_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-01T08:18:45.000.000.000 to 2024-04-01T08:18:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240401_081842_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01D1D3A0 03393A70 02A5A740 03F774E0 000CCE90 020AA9D0 010FFD30 018803A0 01A60130 02BA80D0 00F3E050
      00F3E050 01450830 01E78C20 03144A30 029E6F20 01D158B0 0139F4E0 03A50E90 007789D0 024C4D30 036A6BA0
      036A6BA0 006FAF30 022C3C50 013A2270 01A73340 0174AAE0 03CEFF90 00298050 023D4070 0323E040 02B21060
      02B21060 01EB1850 018F4A30 02A47790 01F64C50 030D6A70 028BDF40 03CE30E0 00292890 023DBCD0 012362B0
      012362B0 01B2D3E0 036BBA10 026F3380 01AC5520 037A7FB0 02C74060 01A4E050 03769070 02CDD840 03AB3460
      03AB3460 007EAE50 0241F970 036105C0 0368C390 026E5120 015979B0 01F5C560 030F27D0 0088B430 00CCEE20
      00CCEE20 02AA9930 03FFD5A0 00003F70 000020C0 02001850 00800A30 00C00F20 02A008B0 03F00CE0 00080A90
      00080A90 020C0FD0 010A0830 018F0C20 03488A30 02ECCF20 00CD5450 0155FF30 01FF00A0 030080F0 0280C080
      0280C080 03C0A0C0 0220F0A0 013088F0 01A8CC80 017CAAC0 01C2FFA0 0191C030 02AC9010 01FAD810 0307B410
      0307B410 00846E10 02C65910
     
