-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 17:11:55 2024 UTC
-- File 20240331_172226_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-31T17:22:29.000.000.000 to 2024-03-31T17:22:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240331_172226_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  014BF4B0 01EE0EE0 03190990 00958D50 02DF4BF0 03B0EE00 01344C80 00D73560 035E57E0 0278BE00 0344E100
      0344E100 02E69180 0395D940 025F35E0 0170AF10 03C8F890 002C84D0 023AC6B0 0327A5E0 025A3B80 01BB9320
      01BB9320 03665AB0 02D577E0 01BFCC10 03602A10 00D03F10 02B82090 01E430D0 031628B0 029D3CE0 02E9D140
      02E9D140 03CE9CF0 0229D280 033D3BC0 02A3A620 01F27530 010B4FA0 038EE870 02499C40 036D5260 00DBFB50
      00DBFB50 015B0370 00FB4160 0286E1D0 01C59130 012759A0 03B4F570 026E8FC0 0359C820 00F52C30 008FBA20
      008FBA20 02C86730 03D62A50 001E9FB0 0011D060 02193850 0115A470 019F7640 0150CD60 03F8ABD0 0004FE30
      0004FE30 00068120 0205C1B0 038390B0 03212C70 02B1BA40 03E96760 001DD4D0 02133EB0 031AA1E0 0097F110
      0097F110 02DC0990 01B20D50 036B0BF0 016F4700 00EC7240 009A4B60 02D76ED0 01BCD9B0 0162B560 03D3EFD0
      03D3EFD0 003A1830 00271420 02349E30 032ED120 005CDCD0 01395950 03A5F5F0 02770F00 034C8880 02EACCC0
      02EACCC0 039FAAA0 00507FF0
     
