-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 10:05:06 2024 UTC
-- File 20240325_195002_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-25T19:50:05.000.000.000 to 2024-03-25T19:50:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240325_195002_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0333D7C0 02AA3C20 01FF2230 0100B320 01C07550 019027F0 00AC1A00 007D0B80 00438E40 00624960 02536DD0
      02536DD0 017ADB30 01C7B6A0 03246DF0 02B65B00 03ED7680 021BCDC0 038B1590 02274FA0 0134E870 01AE9C40
      01AE9C40 0179D260 03C53B50 0027A6F0 00347580 002E4F40 003968E0 0225DC90 029B9960 02EB2AE0 019EBF90
      019EBF90 0351E050 00F91070 00859840 00C75460 02A4FE50 01F68170 010DC1C0 018B2120 01A758D0 01BA7A50
      01BA7A50 03674770 02D4E4C0 03BE96A0 0061DDF0 00513300 0079AA80 00457FC0 0067C020 02542030 03BF1810
      03BF1810 02304A00 03286F00 02BC5880 03E274C0 02134EA0 011AE9F0 01979D00 015C5380 01F27A40 010B4760
      010B4760 03C77260 021265A0 011B5770 0196FCC0 015D82A0 03F343F0 020AE200 030F9300 02885A80 03CC77C0
      03CC77C0 022A4C20 009FB510 036837C0 02DC2C20 01B23A30 016B2720 03DEB4B0 0231EEE0 01291990 03BD9550
      03BD9550 00635FF0 0052F000 003DC400 00119300 00195A80 0015F7C0 001F0C20 02108A30 0318CF20 0094A8B0
      0094A8B0 00DEFCE0 02B18290
     
