-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 09:57:20 2024 UTC
-- File 20240325_135501_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-25T13:55:04.000.000.000 to 2024-03-25T13:55:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240325_135501_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  014D1D00 01EB9380 011E5A40 01917760 03ACE660 007A9550 0247DFF0 03643000 02D62800 03BD3C00 0263A200
      0263A200 03527300 02FB4A80 0386EFC0 0322CC10 0259D500 03753F80 02CFA040 03A87060 007C4850 02426C70
      02426C70 03635A40 02D2F760 01BB8CD0 03664AB0 036AB7F0 016FF600 01D80D00 01340B80 01AE0E40 01790960
      01790960 03C58DD0 00274B30 0034EEA0 022E99F0 0339D500 01529FC0 02FDE810 01831C10 03429210 00E3DB10
      00E3DB10 02923690 01DB2DD0 0336BB30 02ADE6A0 01FB15F0 01069F00 00C2E840 0251CE30 03792920 00C5BDB0
      00C5BDB0 00A76360 02F4D2D0 018EBBB0 0149E660 03ED1550 001B9FF0 00165000 000EBC00 0004F100 00068980
      00068980 0005CD40 00072BE0 0204BE10 0106E110 03859190 00475950 0264F5F0 03568F00 017EE440 02E0CB30
      02E0CB30 0390AEA0 0058F9F0 00748500 004EC780 0069A440 005D7660 0273CD50 014A2BF0 01EF3E00 008C5080
      008C5080 00653C60 0257A250 017C7370 01C24AC0 01236FA0 03B2D870 026BB440 035E6E60 00F15950 0289F5F0
      0289F5F0 01E68780 008AE220
     
