-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 09:40:26 2024 UTC
-- File 20240325_011404_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-25T01:14:07.000.000.000 to 2024-03-25T01:14:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240325_011404_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  026AFA80 035F87C0 02F04420 01886630 014C5520 03EA7FB0 021F4060 0110E050 03989070 012A6C20 03BF5A30
      03BF5A30 0260F720 01508CB0 01F8CAE0 0304AF90 0086F850 02C58470 03A74640 0274E560 02A74BE0 02FA7700
      02FA7700 03874C80 0244EAC0 03669FA0 00D5D070 00BF3840 00E0A460 0290F650 01D88D70 0134CBC0 02D75710
      02D75710 02DE7E40 03B14160 0069E1D0 025D1130 037399A0 00CA5570 00AF7FC0 00F8C020 0284A030 03C6F020
      03C6F020 0012C410 030DD300 028B3A80 03CEA7C0 0229F420 013D0E30 01A38920 03724DB0 02CB6B60 01AEDED0
      01AEDED0 0379B1B0 0362B4B0 0369F770 02DD0CC0 03B38AA0 006A4FF0 005F6800 0070DC00 0048B200 006CEB00
      006CEB00 005A9E80 0077D1C0 02261C90 029A8960 01D7CDD0 033C2B30 02A23EA0 01F321F0 010AB100 018FE980
      018FE980 01481D40 01EC13E0 031A1A10 024B8B80 01B72720 036CB4B0 02DAEEE0 01B79990 036C5550 00DA7FF0
      00DA7FF0 00B74000 00ECE000 009A9000 00D7D800 005E1A00 00388B80 0024CE40 0036A960 022DFDD0 013B0330
      013B0330 01A682A0 0375C3F0
     
