-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 08:25:20 2024 UTC
-- File 20240322_151130_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-22T15:11:33.000.000.000 to 2024-03-22T15:11:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240322_151130_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029642F0 03DD6380 0233D240 032A3B60 00BF26D0 02E0B5B0 0390EF60 005898D0 013A6A50 03A75F70 0274F0C0
      0274F0C0 034E88A0 00E9CCF0 009D2A80 00D3BFC0 00BA6020 02E75030 0394F820 002F4210 031C7180 02924940
      02924940 03DB6DE0 0036DB10 022DB690 013B6DD0 03A6DB30 0275B6A0 014F6DF0 01E8DB00 008E5B40 0264BB70
      0264BB70 0356E6C0 02FD95A0 01835F70 0142F0C0 01E388A0 03124CF0 029B6A80 03D6DFC0 023DB020 0091B410
      0091B410 036CB700 02DAEC80 03B79AC0 026C57A0 015A7C70 01F74240 010CE360 038A92D0 004FDBB0 00683660
      00683660 032E16A0 005C8EF0 0072C980 004BAD40 006E7BE0 02594610 0175E510 03CF1790 00289C50 023CD270
      023CD270 0322BB40 0359F370 017A8560 03C7C7D0 00242430 00363620 022D2D30 033BBBA0 00A66670 00F55540
      00F55540 008FFFE0 02C80010 02D60000 01DE8000 0131C000 01A92000 017DB000 01C36800 0122DC00 01B3B200
      01B3B200 016A6B00 01DF5E80 0130F1C0 02D44490 02DF3360 01B0AAD0 0368FFB0 02DC8060 01B2C050 036BA070
      036BA070 02DE7040 03B14860
     
