-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 00:53:20 2024 UTC
-- File 20240308_101003_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-08T10:10:06.000.000.000 to 2024-03-08T10:10:06.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240308_101003_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0086C380 00C5A240 00A77360 037A6560 00C757D0 02A4FC30 03F68220 000DC330 000B22A0 020EB3F0 0309EA00
      0309EA00 028D1F00 03CB9080 01172C60 03CE5D20 002973B0 003DCA60 02232F50 0132B8F0 01ABE480 017E16C0
      017E16C0 01C11DA0 03219370 02B15AC0 03F4FBD0 00074310 0204E290 010693D0 0385DA30 02473720 0164ACB0
      0164ACB0 01D6FAE0 033D8790 00A34450 02F2E670 01C5CAA0 019397F0 015A5C00 01F77200 010CCB00 018AAE80
      018AAE80 014FF9C0 01E80520 031C07B0 02920460 01DB0650 019B42B0 02AB71F0 03FEC900 0201AD80 03017B40
      03017B40 0281C6E0 01C12590 0321B750 00B16CF0 00E9DA80 009D37C0 0269D610 02AE9E80 03F9D1C0 02053920
      02053920 0107A5B0 01847760 03464CD0 00E56AB0 0097DFE0 02DC3010 01B22810 03B59E00 0137A880 01AC7CC0
      01AC7CC0 017A42A0 03C763F0 0224D200 0336BB00 02ADE680 03FB15C0 02069F20 0105D0B0 02C39C70 01D12920
      01D12920 0339BDB0 02A56360 01F7D2D0 030C3BB0 028A2660 01CF3550 0328AFF0 02BCF800 03E28400 0109E300
      0109E300 00C68940 00A5CDE0
     
