-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 00:45:55 2024 UTC
-- File 20240308_041454_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-08T04:14:57.000.000.000 to 2024-03-08T04:14:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240308_041454_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CD1800 00AB9400 00FE5E00 00817100 00C1C980 00A12D40 00F1BBE0 02896610 01CDD510 032B3F90 025F5020
      025F5020 0170F830 01C88420 032CC630 02BAA520 01E7F7B0 01140C60 039E0A50 00510F70 007988C0 0222A650
      0222A650 0099FAB0 00D507E0 02BF8410 01E04610 03106510 00985790 02D47C50 01BE4270 01616340 01D1D2E0
      01D1D2E0 039C9DC0 03296990 00BDDD50 02E333F0 0392AA00 025BFF00 03760080 02CD00C0 03AB80A0 007E40F0
      007E40F0 00416080 0030E860 03144E20 009E6930 00D15DA0 02B9F370 03E50AC0 02178FA0 011C4870 01926C40
      01926C40 015B5A60 03F6F750 0006C670 0002D2A0 0203BBF0 03026600 02835500 03C2FF80 02238040 03324060
      03324060 00AB6050 02FED070 0381B840 0320B230 03587590 00F44F50 028E68F0 03C95C80 022DF2C0 033B0BA0
      033B0BA0 00A68E70 00F5C940 008F2DE0 02C8BB10 02D67340 03DEA570 0231F7C0 03290C20 00BD8A30 00E34F20
      00E34F20 0292E8B0 03DB9CE0 00365290 022D7BD0 013BC630 02D31290 02DD4DE0 01B3EB10 036A1E90 00DF11D0
      00DF11D0 02B09930 03E8D5A0
     
