-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 06:17:31 2024 UTC
-- File 20240306_220439_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-06T22:04:42.000.000.000 to 2024-03-06T22:04:42.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240306_220439_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03970000 025C8000 0372C000 02CBA000 03AE7000 02794800 0345EC00 01738D00 00E525C0 024BDB90 02B71B20
      02B71B20 00F64B50 028D6EF0 03CBD980 022E3540 03392FE0 00A5B810 02F76410 018CD610 034ABD10 00EFE390
      00EFE390 034C0920 007506D0 024F85B0 03684760 00DC64D0 02B256B0 03EB7DE0 001EC310 0211A290 011973D0
      011973D0 0395CA30 032F9790 025C2E20 01723930 01CB25A0 032EB770 02B9ECC0 03E51AA0 001797F0 001C5C00
      001C5C00 00127200 001B4B00 000B7740 02076670 0304D540 0286BFE0 01C5E010 03271010 00B49810 02EED410
      02EED410 0199BE10 03556110 00FFD190 03401CA0 00700970 00480DC0 006C0B20 025A0EB0 037709E0 00CC8D10
      00CC8D10 02AACB90 01FFAE50 03007970 028045C0 03E03390 02081520 010C1FB0 018A1060 034F1850 00E89470
      00E89470 009CDE40 00D2B160 02BBE9D0 01E61D30 011513A0 01CFCD30 029415D0 01DE1F30 013110A0 03A998F0
      03A998F0 027D5480 0343FEC0 02E201A0 01930170 015A81C0 01F7C120 018610D0 01A28C50 0373CA70 02CA2F40
      02CA2F40 03AF38E0 0078A490
     
