-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 06:05:30 2024 UTC
-- File 20240306_132017_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-06T13:20:20.000.000.000 to 2024-03-06T13:20:20.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240306_132017_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  018E4CD0 03496AB0 02EDDFE0 019B3010 0356A810 027EFE00 01A0C080 00B85060 03723C20 00659110 02575990
      02575990 017CF550 03C28FF0 0223C800 03322C00 02AB3A00 03FEA700 0201F480 03010EC0 0340C4D0 00705350
      00705350 02487AF0 036C4780 02DA6440 03B75660 006CFD50 025A83F0 0377C200 02CC2300 03AA3280 013F95E0
      013F95E0 03D02F80 02383840 03242460 00B63650 02ED2D70 039BBBC0 02566620 017D5530 01C3FFA0 03220070
      03220070 01598020 01FAA010 0307F010 00840810 02C60C10 01A50A10 03778F10 00CC4890 02AA6CD0 01FF5AB0
      01FF5AB0 0100F7E0 03C04600 01103280 01982BC0 01543E20 03FE2130 020131A0 0101A970 01817DC0 0141C320
      0141C320 03E122B0 0211B3E0 028CB500 01E577C0 0117CC20 039C2A30 02523F20 017B20B0 01C6B0E0 0325E890
      0325E890 00B71CD0 02EC92B0 039ADBE0 022BDB00 019F1B40 015096E0 03F8DD90 0004B350 0206EAF0 03059F80
      03059F80 02875040 03C4F860 00268450 0235C670 019792A0 01AE2DF0 01793B00 01C5A680 012775C0 01B4CF20
      01B4CF20 036EA8B0 02D9FCE0
     
