-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 05:10:44 2024 UTC
-- File 20240304_201108_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-04T20:11:11.000.000.000 to 2024-03-04T20:11:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240304_201108_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0270A270 0348F340 02EC8AE0 019ACF90 0357A850 00FC7C70 00412120 0130D8D0 01D45A50 019F3BB0 02A85330
      02A85330 03FC7AA0 000247F0 00036400 0002D600 0003BD00 00026380 00035240 0002FB60 020386D0 008122D0
      008122D0 0160D9D0 03D0B530 0238EFA0 01249870 01B6D440 016DBE60 03DB6150 0036D1F0 002DB900 003B6580
      003B6580 00136BA0 010D6F30 018BD8A0 034E34F0 02E92E80 039DB9C0 02536520 017AD7B0 01C7BC60 03246250
      03246250 00B65370 0076BD60 0326F1E0 00B58910 02EF4D90 0198EB50 03549EF0 02FED180 0381B940 024165E0
      024165E0 0161D710 03D13C90 021CD160 02895CE0 01CDF290 032B0BD0 00BE8E30 00E1C920 02912DB0 03D9BB60
      03D9BB60 003566D0 022FD5B0 03383F60 02521060 02BD8C20 01E34A30 0112EF20 039B98B0 025654E0 017D7E90
      017D7E90 03C3C1D0 00222130 003331A0 022AA970 019FFEE0 03A800C0 027C00A0 014200F0 01E30080 011280C0
      011280C0 019BC0A0 035620F0 02FD3080 0383A8C0 02427CA0 00B1A170 0074B8E0 024EE490 016996D0 03DD5DB0
      03DD5DB0 0233F360 012A0AD0
     
