-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 05:09:14 2024 UTC
-- File 20240304_190331_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-04T19:03:34.000.000.000 to 2024-03-04T19:03:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240304_190331_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00C8E600 00AC9500 00FADF80 0087B040 00C46860 02A65C50 01F57270 010FCB40 01882EE0 034C3990 00EA2550
      00EA2550 029F37F0 03D0AC00 011C7D00 00C921C0 00ADB120 02FB69B0 0386DD60 0045B3D0 02676A30 0354DF20
      0354DF20 00FEB0B0 0081E8E0 02C11C90 02D0C960 02DC56E0 01B27D90 036B4350 00DEE2F0 00B19380 00E95A40
      00E95A40 009DF760 02D30CD0 01BA8AB0 0167CFE0 03EA1400 010F8F00 01884880 014C6CC0 01EA5AA0 031F77F0
      031F77F0 0290CC00 03D8AA00 0234FF00 032E8080 02B9C0C0 03F29050 0005EC30 00071A20 02049730 0306DCA0
      0306DCA0 0085B2F0 00C76B80 00A4DE40 00F6B160 028DE9D0 01CB1D30 029749D0 00EE7690 02994DD0 01D5EB30
      01D5EB30 013F1EA0 03A091F0 0270D900 0348B580 02ECEF40 039A98E0 0057D490 033E1F60 02508860 0178CC50
      0178CC50 03C4AA70 0226FF40 033580E0 00AF4090 02F8E0D0 018490B0 0146D8E0 03E5B490 020BB760 02873660
      02873660 01C4AD50 0326FBF0 02B58600 03EF4500 0218E780 03149440 029EDE60 01D1B150 033969F0 0152EE80
      0152EE80 00FDCCE0 02832A90
     
