-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 04:50:10 2024 UTC
-- File 20240304_053131_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-04T05:31:34.000.000.000 to 2024-03-04T05:31:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240304_053131_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  015C01B0 02F900B0 03C2C070 0111D020 01CC9C10 03956900 025FDD80 03703340 02C82AE0 01AC3F90 037A2050
      037A2050 00C73070 00A4A840 00F6FC60 028D8250 00E5A1B0 024BB8B0 036E64E0 00D95690 02B5FDD0 01EF0330
      01EF0330 011882A0 0394C3F0 025EA200 0371F300 02C90A80 01D6C7E0 039ED200 0251BB00 03796680 02C5D5C0
      02C5D5C0 03A73F20 0074A0B0 004EF0E0 02698890 015D4CD0 03F3EAB0 03050FF0 0143C400 01E22600 01133500
      01133500 019AAF80 0157F840 01FC0460 03020650 00830570 00C287C0 00A3C420 01791310 03E2CD40 0213ABE0
      0213ABE0 011A7E10 03974110 005CE190 02729150 014BD9F0 01EE3500 01192F80 0195B840 02AFB230 03FC3590
      03FC3590 00022F50 020338F0 0302A480 0283F6C0 03C20DA0 00230B70 00328EC0 002BC9A0 023E2D70 01909DE0
      01909DE0 03AC6980 027A5D40 034773E0 00E4CA10 0296AF10 01DDF890 033304D0 00AA86B0 00FFC5E0 02802710
      02802710 02E01A40 03C80BB0 022C0E60 013A0950 03A70DF0 02748B00 034ECE80 02E9A9C0 039D7D20 0053C3B0
      0053C3B0 007A2260 032399A0
     
