-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 02:20:01 2024 UTC
-- File 20240303_025524_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-03T02:55:27.000.000.000 to 2024-03-03T02:55:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240303_025524_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0212D800 031BB400 02966E00 03DD5900 0233F580 032A0F40 02BF08E0 01E08C90 0310CAD0 0098AFB0 00D4F860
      00D4F860 02BE8450 01E1C670 01112540 0199B7E0 03556C10 027FED00 01A00DC0 01700B20 03C80EB0 022C09E0
      022C09E0 013A0D10 03A70B90 00748E50 024EC970 0369ADC0 02DD7B20 00D9E350 015A8970 01F7CDC0 010C2B20
      010C2B20 038A3EB0 024F21E0 0168B110 03DCE990 00329D50 022BD3F0 033E3A00 01509380 00FC6D20 02825BB0
      02825BB0 03C37660 0022CD50 0233ABF0 032A7E00 02BF4100 03E0E180 02109140 0318D9E0 024A5A80 01B7BBE0
      01B7BBE0 036C6610 00DA5510 02B77F90 01ECC050 031AA070 0297F040 03DC0860 00320C50 022B0A70 019F47A0
      019F47A0 01A87230 017C4B20 03C26EB0 022359E0 0132F510 03AB8F90 007E4850 02416C70 0361DA40 02D13760
      02D13760 02DCD660 02D95EA0 01B5F1F0 016F0900 01D88D80 0134CB40 01AEAEE0 0379F990 00C50550 02A787F0
      02A787F0 03F44400 01073300 00C25540 00A37FE0 02F2C010 018BA010 034E7010 00E94810 029DEC10 01D31A10
      01D31A10 033A9710 00A7DC90
     
