-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 01:52:59 2024 UTC
-- File 20240303_010554_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-03T01:05:57.000.000.000 to 2024-03-03T01:05:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240303_010554_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  028C0590 01CA0750 032F04F0 02B88680 03E4C5C0 0216A720 011DF4B0 01930EE0 035A8990 00F7CD50 014615F0
      014615F0 01E51F00 01179080 019C58C0 015274A0 03FB4EF0 0206E980 03059D40 028753E0 01C4FA10 03934380
      03934380 012D7120 03BBC9B0 02662D60 01553BD0 03FFA630 02007520 01004FB0 01806860 03405C50 00E07270
      00E07270 004825A0 01361BB0 01AD1660 037B9D50 00C653F0 00A57A00 00F7C700 008C2480 00CA36C0 00AF2DA0
      00AF2DA0 02F8BB70 01C27360 0391A560 005977D0 0275CC30 034F2A20 00E8BF30 009CE0A0 02D290F0 03BBD880
      03BBD880 026634C0 03552EA0 007FDCF0 00201940 003015E0 02281F10 013C1090 03A218D0 007314B0 004A9EE0
      004A9EE0 026FD190 01583950 03F425F0 01071B80 00C24B20 02A36EB0 03F2D9E0 000BB510 020E6F90 01095850
      01095850 038DF470 024B0E40 036E8960 00D9CDD0 015A9590 03FBEFA0 00061870 00051440 00079E60 02045150
      02045150 010679F0 01854500 0147E780 01E41440 01161E60 03CE88A0 0014E670 001E9540 0011DFE0 02193010
      02193010 0115A810 039F7C10
     
