-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 00:26:15 2024 UTC
-- File 20240302_200658_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T20:07:01.000.000.000 to 2024-03-02T20:07:01.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_200658_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029D3810 01D3A410 033A7610 00A74D10 02F4EB90 018E9E50 0349D170 02ED39C0 039BA520 002B3BD0 023EA630
      023EA630 0321F520 00B10FB0 00E98860 029D4C50 01D3EA70 013A1F40 01A710E0 03749890 02676A60 02AA6FA0
      02AA6FA0 01FF5870 0100F440 01808E60 0340C950 00E0ADF0 0090FB00 00D88680 00B4C5C0 00EEA720 014CFA50
      014CFA50 01F543B0 010FE260 03881350 004C1AF0 006A1780 005F1C40 00709260 0248DB50 016CB6F0 01DAED80
      01DAED80 009BCDA0 016B15B0 01DE9F60 0331D0D0 00A938B0 00FDA4E0 02837690 01C2CDD0 0323AB30 02B27EA0
      02B27EA0 01EB41F0 008F7080 00646460 02565650 017D7D70 01C3C3C0 01222220 03B33330 026AAAA0 015FFFF0
      015FFFF0 01F00000 01080000 00C60000 00528000 007BC000 00462000 00653000 0057A800 007C7C00 00424200
      00424200 00636300 0052D280 007BBBC0 02233310 02995540 03D5FFE0 003F0010 02208010 0130C010 03A8A010
      03A8A010 007CF010 02428810 0163CC10 03D22A10 021D9F80 0189A820 034D7C30 02EBC220 019E2330 015132A0
      015132A0 03F9ABF0 02057E00
     
