-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 17 00:12:23 2024 UTC
-- File 20240302_193446_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T19:34:49.000.000.000 to 2024-03-02T19:34:49.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_193446_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  023D2DA0 0123BB70 01B266C0 016B55A0 03DEFF70 023180C0 032940A0 005EF070 00718840 00494C60 026DEA50
      026DEA50 015B1F70 01F690C0 010DD8A0 038B34F0 024EAE80 0369F9C0 036E8290 026CE1E0 015A9110 03F7D990
      03F7D990 000C3550 020A2FF0 030F3800 0288A400 03CCF600 022A8D00 033FCB80 01501720 01FC0E50 03020970
      03020970 02830DC0 03C28B20 0023CEB0 003229E0 022B3D10 013EA390 03A1F250 00710B70 0024C760 031B5260
      031B5260 0096FB50 02DD86F0 03B34580 026AE740 035F94E0 00F05E90 028871D0 01CC4930 012A6DA0 01DFADB0
      01DFADB0 02983DB0 03D42360 003E32D0 02212BB0 0331BE60 00A96150 02FDD1F0 03833900 0242A580 0363F740
      0363F740 03690670 016EC2A0 03D9A3F0 02357200 032FCB00 02B82E80 03E439C0 02162520 011D37B0 0193AC60
      0193AC60 035A7A50 007BA3B0 02233930 0332A5A0 00ABF770 00FE0CC0 00810AA0 02C18FF0 03A14800 0271EC00
      0271EC00 03491A00 02ED9700 01CDAE40 0295BCB0 03DF62E0 0030D390 0228BA50 013CE770 01A294C0 0173DEA0
      0173DEA0 03CA31F0 022F2900
     
