-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 23:29:16 2024 UTC
-- File 20240302_165051_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T16:50:54.000.000.000 to 2024-03-02T16:50:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_165051_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  020A7540 030F4FE0 02447400 01B32700 00B55A40 00EFF760 02980CD0 01D40AB0 013E0FE0 03A10810 00718C10
      00718C10 02494A10 016DEF10 03DB1890 021B4A60 028B77A0 01CECC70 0129AA40 01BD7F60 0363C0D0 00D220B0
      00D220B0 00BB30E0 02E6A890 0195FCD0 035F02B0 037841F0 01623080 01D328C0 013ABCA0 03A7E2F0 02741380
      02741380 034E1A40 02E91760 019D9CD0 035352B0 02FAFBE0 02C3C300 01D11140 013999E0 03A55510 0077FF90
      0077FF90 024C0050 016A0070 01DF0040 01308060 03A8C050 007CA070 00217820 0118E210 03949310 005EDA90
      005EDA90 0271B7D0 01496C30 01EDDA20 031B3730 0296ACA0 01DDFAF0 01330780 00D54220 015FF190 03F00950
      03F00950 00080DF0 000C0B00 000A0E80 000F09C0 00088D20 020CCBB0 030AAE60 008FF950 016402F0 00EB01C0
      00EB01C0 009E8120 02D1C1B0 03B92160 0065B1D0 02576930 037CDDA0 00C2B370 00A3EAC0 00F21FA0 01458830
      01458830 02F3A610 018A7510 034F4F90 00E8E850 029C9C70 03D2D240 023BBB60 012666D0 03B555B0 026FFF60
      026FFF60 02AC0060 02FD0020
     
