-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 23:25:31 2024 UTC
-- File 20240302_164236_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T16:42:39.000.000.000 to 2024-03-02T16:42:39.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_164236_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  035C2850 00F23C70 008B2240 00CEB360 02A9EAD0 00FE8FD0 0140E410 03F04B00 01043740 01862CE0 03453A90
      03453A90 00E7A7D0 02947430 03DE4E20 00316930 0029DDA0 023D3370 0323AAC0 03593FD0 007AD010 0247B810
      0247B810 01646410 03D65610 003D7D10 0223C390 01322250 03AB3370 027EAAC0 0341FFA0 00708030 02246010
      02246010 01365010 03AD7810 007BC410 02462610 01653510 03D7AF90 003C7850 02224470 03336640 03556AB0
      03556AB0 037FEFF0 02C01800 03A01400 02701E00 03481100 02EC1980 039A1540 02571FE0 017C9010 03C2D810
      03C2D810 0211DA00 018C9B80 014AD640 01EFBD60 031863D0 00945230 00DE7B20 02B146B0 03E9E5E0 001D1710
      001D1710 02139C90 028D2960 02E5DEE0 01973190 035CA950 00F2FDF0 008B8300 00CE4280 00A963C0 00FDD220
      00FDD220 02833B30 03C2A6A0 0011FAF0 000C83C0 000AC220 020FA330 030872A0 008C4BF0 00CA6E00 00AF5900
      00AF5900 00F8F580 00848F40 00C6C8E0 0352D640 037DDEB0 02C331E0 01A2A910 0373FD90 00CA0350 02AF02F0
      02AF02F0 03F88380 0204C240
     
