-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 22:41:34 2024 UTC
-- File 20240302_150313_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T15:03:16.000.000.000 to 2024-03-02T15:03:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_150313_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0005C600 00072500 0004B780 0006EC40 00059A60 02075750 0104FCF0 01868280 0145C3C0 02F39110 02C52CC0
      02C52CC0 03D3DD50 001D19F0 00139500 001A5F80 00177040 001CC860 0212AC50 011BFA70 01960740 015D04E0
      015D04E0 03F38690 020522E0 0283D9C0 03C23520 00232FB0 0032B860 022BE450 013E1670 01A11D40 017193E0
      017193E0 03C95A10 002DF710 031D8640 0349A2B0 02ED73E0 019BCA10 03562F10 00FD3890 0283A4D0 01C276B0
      01C276B0 01234DE0 03B2EB10 006B9E90 032F28E0 025C5E40 03727160 00CB49D0 02AEED30 03F99BA0 00055670
      00055670 0007FD40 000403E0 02060210 01050310 03C3C140 031110F0 02999880 03D554C0 023FFEA0 012001F0
      012001F0 01B00100 01680180 01DC0140 013201E0 03AB0110 023F40C0 03907050 00584870 00746C40 004E5A60
      004E5A60 02697750 015DCCF0 01F32A80 010ABFC0 018FE020 03481030 03760C10 02668500 0355C780 02FF2440
      02FF2440 0380B660 0040ED50 02609BF0 0350D600 02F8BD00 0384E380 02469240 03B2EDB0 0335CDB0 02AF2B60
      02AF2B60 01F8BED0 0304E1B0
     
