-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 19:45:55 2024 UTC
-- File 20240302_100431_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T10:04:34.000.000.000 to 2024-03-02T10:04:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_100431_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00AB8420 02FE4630 03816520 0041D7B0 00613C60 0251A250 01797370 00E2E560 0349CBE0 02769700 034DDC80
      034DDC80 02EB32C0 039EABA0 0051FE70 00790140 004581E0 02674110 0154E190 03FE9150 0000ECF0 00004D40
      00004D40 00006BE0 02005E10 01007110 03804990 00406D50 02605BF0 03507600 02F84D00 03846B80 01232F20
      01232F20 01D95C50 0335F270 02AF0B40 03F88EE0 0004C990 0206AD50 0105FBF0 01870600 01448500 01E6C780
      01E6C780 008AD220 0167DD90 03D43350 003E2AF0 00213F80 0031A040 00297060 023DC850 01232C70 01B2BA40
      01B2BA40 016BE760 03EF0A60 020C47A0 010A6470 018F5640 0148FD60 03EC83D0 001AC230 0017A320 021C72B0
      021C72B0 03124BE0 009B6E10 036B6C80 016F6D60 03D8DBD0 0034B630 002EED20 02399BB0 03255660 00B7FD50
      00B7FD50 02EC03F0 039A0200 02570300 01BE4140 02B0B0F0 03E8E880 021C9CC0 0312D2A0 009BBBF0 00D66600
      00D66600 00BD5500 00E3FF80 00920040 00DB0060 035B4020 007B7010 0246C810 0165AC10 03D77A10 003CC710
      003CC710 0222A490 0133F6D0
     
