-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 17:23:55 2024 UTC
-- File 20240302_062204_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T06:22:07.000.000.000 to 2024-03-02T06:22:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_062204_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01DCB6A0 0332EDF0 02AB9B00 03FE5680 02017DC0 0301C320 008122B0 0260D9F0 01A85A80 00BE3BE0 02E12610
      02E12610 0191B510 03596F90 00F5D850 028F3470 03C8AE40 022CF960 013A85D0 03A7C730 033A1250 00538DB0
      00538DB0 007A4B60 02476ED0 0164D9B0 01D6B560 033DEFD0 00A31830 00F29420 028BDE30 03CE3120 001494D0
      001494D0 010F6F50 0388D8F0 024CB480 036AEEC0 02DF99A0 01B05570 01687FC0 01DC4020 03326030 02AB5020
      02AB5020 00FF7C10 03406100 02E05180 03907940 025845E0 01746710 03CE5490 00297ED0 023DC1B0 03232160
      03232160 00B2B1D0 0175F490 03E78760 001444D0 021E66B0 031155E0 0099FF10 02D50090 01BF80D0 036040B0
      036040B0 02D060E0 01B85090 03B23C60 02359120 012F59B0 01B8F560 03648FD0 00D6C830 00BDAC20 02E37A30
      02E37A30 0392C720 005BA4B0 007676E0 0326A6C0 035AFAD0 00F787B0 008C4460 02CA6650 01AF5570 0178FFC0
      0178FFC0 01C48020 0326C030 02B5A020 01EF7030 028C6410 02E52B00 0397BE80 025C61C0 03725120 00CB79B0
      00CB79B0 00AEC560 02F9A7D0
     
