-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 17:14:37 2024 UTC
-- File 20240302_055324_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T05:53:27.000.000.000 to 2024-03-02T05:53:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_055324_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0035F890 022F04D0 013886B0 01A4C5E0 0376A710 00CDF490 02AB0ED0 01FE89B0 0101CD60 03812BD0 0041BE30
      0041BE30 00616120 0251D1B0 03BC9CB0 0262D2E0 0153BB90 03FA6650 00075570 0004FFC0 00068020 0205C030
      0205C030 03072020 0084B030 02637410 02A96700 03FDD480 02033EC0 0302A1A0 0083F170 00C209C0 00A30D20
      00A30D20 02F28BB0 038BCE60 004E2950 01349EF0 00D768C0 00BCDCA0 02E2B2F0 0393EB80 025A1E40 03771160
      03771160 00CC99D0 02AAD530 03FFBFA0 00006070 00002820 01001E10 03801110 00401990 02601550 01501FF0
      01501FF0 01F81000 01041800 01861400 01451E00 01E79100 008A2CC0 02679D50 015453F0 01FE7A00 01014700
      01014700 0181E480 014116C0 01E19DA0 03115370 0299FAC0 03D507A0 001FC230 02081190 010C1950 038A15F0
      038A15F0 024F1F00 03689080 02DCD8C0 03B2B4A0 006BEEF0 005E1980 00711540 0224CFF0 019B5400 0156FE00
      0156FE00 01FD8100 01034180 0182E140 014391E0 03E25910 00137590 021ACF50 0117A8F0 00CE3E40 025490B0
      025490B0 037ED8E0 00C1B490
     
