-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 15:56:15 2024 UTC
-- File 20240302_032351_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-02T03:23:54.000.000.000 to 2024-03-02T03:23:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240302_032351_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00282B00 003C3E80 002221C0 00333120 011554D0 01CFFF50 01940070 015E0040 01F10060 03098050 008D4070
      008D4070 00CBE040 00AE1060 02F91850 01859470 01475E40 02F278B0 03C5A270 02277340 0334CAE0 00AEAF90
      00AEAF90 02F9F850 01850470 01478640 01E44560 031667D0 009D5430 0269FF10 02AE8040 03F9C060 00052050
      00052050 0207B070 03046840 02865C60 01C57250 0327CB70 02B42EC0 03EE39A0 000C92B0 02056DF0 0307DB00
      0307DB00 02843680 03C62DC0 02253B20 0137A6B0 01AC75E0 037A4F10 00C76890 02A4DCD0 00FB5950 01437AF0
      01437AF0 01E2C780 0113A440 019A7660 03574D50 00FCEBF0 00829E00 00C3D100 00A23980 00F32540 02455BF0
      02455BF0 01B3FB00 016A0680 01DF05C0 01308720 03A8C4B0 027CA6E0 0142F590 03E38F50 001248F0 001B6C80
      001B6C80 000B6D60 03076DE0 0084DB10 02C6B690 01A5EDD0 03771B30 02CC96A0 01AADDF0 017FB300 01C06A80
      01C06A80 01205FC0 02D83810 02DA1200 03B71B00 026C9680 035ADDC0 02F7B320 018C6AB0 014A5FE0 03EF7010
      03EF7010 0018C810 0214AC10
     
