-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 13:03:44 2024 UTC
-- File 20240301_211050_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T21:10:53.000.000.000 to 2024-03-01T21:10:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_211050_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CE4EB0 00A969E0 037EEE80 0160CCE0 03D0AA90 0038FFD0 02248030 0336C020 00ADA030 00FB7020 0286C830
      0286C830 03C5AC20 00277A30 021A6390 028BA920 01CE7DB0 01294360 03BDE2D0 006313B0 00529A60 027BD750
      027BD750 01463CF0 01E52280 0117B3C0 02CE3510 02D497C0 03BEDC20 0061B230 00516B20 0279DEB0 034531E0
      034531E0 00E7A910 02947D90 01DE4350 033162F0 0154E9C0 02FF4E90 0180E9D0 03409D30 02E0D3A0 0190BA70
      0190BA70 0158E740 01F494E0 030EDE90 0089B1D0 02CD6930 03D5EED0 001F8CD0 02104AB0 03186FE0 00945810
      00945810 02DE7410 01B14E10 0369E910 00DD1D90 02B39350 01EA5AF0 008FBBC0 02643310 01562A90 03FD3FD0
      03FD3FD0 0003A030 00027020 02034830 0302EC20 00839A30 00C25720 02A37CB0 03F96170 0102E8E0 03839C90
      03839C90 004252D0 02637BB0 0352C660 00FBA550 028677F0 03C54C00 0227EA00 03341F00 01570840 02FE4630
      02FE4630 03816520 0041D7B0 00613C60 0251A250 01797370 01C5CAC0 01272FA0 03B4B870 026EE440 03ACCB30
      03ACCB30 033D5750 00A3FCF0
     
