-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 13:00:44 2024 UTC
-- File 20240301_210516_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T21:05:19.000.000.000 to 2024-03-01T21:05:19.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_210516_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00148200 001EC300 0011A280 001973C0 020AE510 010F9790 03885C50 004C7270 006A4B40 005F6EE0 0270D990
      0270D990 0148B550 03ECEFF0 021A9800 018BEA00 00A70F80 00F48840 008ECC60 02C9AA50 01AD7F70 017BC0C0
      017BC0C0 01C620A0 032530F0 02B7A880 03EC7CC0 030D2150 0045D8F0 00673480 0054AEC0 007EF9A0 02418570
      02418570 036147C0 02D1E420 01B91630 01659D20 03D753B0 031E7D30 0348A1D0 00ECF130 009A89A0 02D7CD70
      02D7CD70 03BC2BC0 02623E20 01532130 01FAB1A0 0307E970 02841DC0 03E30990 020946A0 010DE5F0 018B1700
      018B1700 014E9C80 01E9D2C0 011D3BA0 0393A670 025A7540 03774FE0 00CCE810 03554E00 017FF480 01C00EC0
      01C00EC0 012009A0 03B00D70 02680BC0 035C0E20 00F20930 008B0DA0 02CE8B70 03A9CEC0 033E94D0 0050EF50
      0050EF50 027898F0 0344D480 02E6BEC0 0395E1A0 005F1170 007099C0 0048D520 026CBFB0 035AE060 027BC820
      027BC820 00A31610 02F29D10 018BD390 034E3A50 00E92770 009DB4C0 00D36EA0 02BAD9F0 03E7B500 02146F80
      02146F80 018F2C20 01A45D10
     
