-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 12:46:35 2024 UTC
-- File 20240301_202650_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T20:26:53.000.000.000 to 2024-03-01T20:26:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_202650_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0057B400 007C6E00 00425900 0031BAC0 0214B3D0 008F7510 02C8CF90 01ACA850 037AFC70 02C78240 03A44360
      03A44360 007662D0 024D53B0 036BFA60 00DE0750 01588270 00FA61A0 02875170 03C4F9C0 02268520 0135C7B0
      0135C7B0 01AF2460 0378B650 00C4ED70 00A69BC0 00F5D620 01479E90 03F228E0 000B3C90 020EA2D0 0109F3B0
      0109F3B0 018D0A60 034B8F50 00EE48F0 00996C80 00D5DAC0 00BF37A0 01705630 02E43E90 019621D0 035D3130
      035D3130 02F3A9A0 018A7D70 014F43C0 01E8E220 031C9330 0292DAA0 01DBB7F0 009B3600 006B5680 005EFDC0
      005EFDC0 00718320 024942B0 036DE3E0 00DB1210 02B69B10 01EDD690 031B3DD0 0096A330 026EF950 00ACC2F0
      00ACC2F0 00FAA380 0087F240 00C40B60 02A60ED0 01F509B0 010F8D60 03884BD0 004C6E30 006A5920 012FBAD0
      012FBAD0 01DC33D0 03322A30 02AB3F20 01FEA0B0 0101F0E0 03810890 00418CD0 02614AB0 0351EFE0 00F91810
      00F91810 0342CA00 0171D780 01C93C40 012DA260 03BB7350 0066CAF0 0055AF80 007F7840 0040C460 0260A650
      0260A650 0150F570 00FC47E0
     
