-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 12:41:53 2024 UTC
-- File 20240301_201345_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T20:13:48.000.000.000 to 2024-03-01T20:13:48.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_201345_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  034B2E60 00EEB950 0299E5F0 03D51700 023F9C80 032052C0 02B07BA0 01E84670 011C6540 02C92BF0 01D6DF00
      01D6DF00 009ED840 0268DA30 035CB720 00F2ECB0 008B9AE0 02CE5790 01A97C50 037DC270 02C32340 03A2B2E0
      03A2B2E0 0073EB90 03250F20 005BC450 02762670 034D3540 02EBAFE0 019E7810 03514410 00F9E610 02851510
      02851510 01C79F90 03245050 005B3C30 023B5110 0126F990 03B58550 006F47F0 0058E400 00749600 004EDD00
      004EDD00 0069B380 005D6A40 0073DF60 03251860 025BCA20 01762F30 01CD38A0 032BA4F0 02BE7680 03E14DC0
      03E14DC0 0211EB20 01191EB0 019591E0 035F5910 02787AC0 03A223D0 00733230 004AAB20 026FFEB0 035801E0
      035801E0 00F40110 028E0190 01C90150 032D81F0 02BB4100 01F370C0 02856450 01C7D670 01243D40 01B623E0
      01B623E0 036D3210 00DBAB10 02B67E90 01ED41D0 031BE130 029611A0 00EE8CB0 024CE570 036A97C0 02DFDC20
      02DFDC20 01B03230 01682B20 03DC3EB0 023221E0 012B3110 03BEA990 0061FD50 012881F0 00DE6080 00B150C0
      00B150C0 00E9F8A0 029D04F0
     
