-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 11:41:58 2024 UTC
-- File 20240301_170142_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T17:01:45.000.000.000 to 2024-03-01T17:01:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_170142_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03A5AA70 02777F40 034CC0E0 00EAA090 029FF0D0 01D008B0 01380CE0 03A40A90 00760FD0 01268410 03DAE300
      03DAE300 02379280 032C5BC0 02BA7620 01E74D30 0114EBA0 039E9E70 0251D140 037939E0 00C5A510 0353BBC0
      0353BBC0 037D3310 00C3AA90 02A27FD0 01F34030 010AE020 038F9030 02485820 016C7430 01DA4E20 03376930
      03376930 03566ED0 007EACD0 0241FAB0 036107E0 00D18410 02B94610 01E5E510 03171790 009C9C50 02D2D270
      02D2D270 03BBBB40 03333370 01555560 03FFFFD0 00000030 00000020 02000030 03000020 00800030 00C00020
      00C00020 02A00030 03F00020 00040010 03030000 02828000 03C3C000 02222000 03333000 02AAA800 03FFFC00
      03FFFC00 02000200 03000300 02800280 01E001E0 03880080 024C00C0 036A00A0 00DF00F0 00B08080 00E8C0C0
      00E8C0C0 009CA0A0 02D2F0F0 03BB8880 02664CC0 03AAB550 003FF7F0 00200C00 00300A00 00280F00 003C0880
      003C0880 00220CC0 00330AA0 022A8FF0 033FC800 02A02C00 01F81D00 008209C0 00C30D20 02A28BB0 03F3CE60
      03F3CE60 000A2950 020F3DF0
     
