-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 11:38:58 2024 UTC
-- File 20240301_165728_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T16:57:31.000.000.000 to 2024-03-01T16:57:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_165728_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03A89F30 027CD0A0 0142B8F0 01E3E480 011216C0 019B1DA0 01AB49B0 017EED60 03C19BD0 00215630 0031FD20
      0031FD20 022903B0 033D8260 00A34350 02F2E2F0 038B9380 01272D20 01DA5DD0 03377330 02ACCAA0 01FAAFF0
      01FAAFF0 0107F800 01840400 01460600 01E50500 01178780 019C4440 02A93330 03FED550 0001BFF0 00016000
      00016000 0001D000 00013800 0001A400 00017600 0001CD00 00012B80 0001BE40 0200B0B0 03807470 02404E40
      02404E40 03606960 00D05DD0 02B87330 03E44AA0 00166FF0 001D5800 0013F400 001A0E00 000B8480 00072360
      00072360 0204B2D0 0106EBB0 01859E60 03475150 00E4F9F0 00968500 00DDC780 00B32440 00EAB660 034FF6A0
      034FF6A0 007406F0 004E0580 00690740 005D84E0 02734690 014AE5D0 03EF9730 02185CA0 011472F0 019E4B80
      019E4B80 00A8B720 017E7650 03C14D70 0221EBC0 03311E20 00A99130 00FD59A0 0283F570 03C20FC0 02230820
      02230820 01328C30 02D5E510 02DF8BC0 03B04E20 00686930 005C5DA0 02727370 034B4AC0 02EEEFA0 01999870
      01999870 01555440 01FFFE60
     
