-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 16 10:36:00 2024 UTC
-- File 20240301_150918_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-01T15:09:21.000.000.000 to 2024-03-01T15:09:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240301_150918_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  035F5DB0 02F0F360 01888AD0 034CCFB0 02EAA860 019FFC50 01A80130 02BE00D0 00F08050 01446030 02F32810
      02F32810 018ABC10 034FE210 00E81310 029C1A90 01D217D0 033B1C30 02A69220 01F5DB30 010F36A0 01C456F0
      01C456F0 00933EC0 00DAA1A0 02B7F170 03EC09C0 021A0D20 01170BB0 019C8E60 0352C950 00FBADF0 00867B00
      00867B00 0062A340 0229F970 033D05C0 02A38720 01F244B0 010B66E0 038ED590 0049BF50 026D60F0 035BD080
      035BD080 02F638C0 03C69250 0012EDB0 001B9B60 021656D0 011D7DB0 0193C360 035A22D0 00F733B0 008CAA60
      008CAA60 02CAFF50 01AF80F0 00BC2040 02711830 03499420 00ED5E30 009BF120 02D609B0 03BD0D60 00638BD0
      00638BD0 02524E30 037B6920 00C6DDB0 0252D9B0 03BDDAB0 026337E0 0152AC10 03FBFA10 00060710 02050490
      02050490 010786D0 038445B0 02466760 016554D0 01EBFF50 018F0070 01488040 01ECC060 031AA050 0097F070
      0097F070 00DC0840 00B20C60 02EB0A50 019E8F70 0151C8C0 02FC9650 00C16EB0 00A1D9E0 02F13510 0189AF90
      0189AF90 034D7850 00EBC470
     
