-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Apr 15 21:49:44 2024 UTC
-- File 20240225_182922_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-25T18:29:25.000.000.000 to 2024-02-25T18:29:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240225_182922_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03825730 02437CA0 0162C2F0 01D3A380 013A7240 01A74B60 0374EED0 00CE99B0 0254EAB0 03BF4FF0 01307400
      01307400 00D42700 005F1A40 00709760 0248DCD0 016CB2B0 01DAEBE0 03379E10 00AC5110 02FA7990 01874550
      01874550 0344E7F0 01734A00 00E57780 0097CC40 00DC2A60 02B23F50 01EB20F0 011EB080 0191E8C0 01591CA0
      01591CA0 03F592F0 020F5B80 01847B20 01A32350 0372B2F0 02CBEB80 03AE1E40 02791160 014599D0 03E75530
      03E75530 0214FFA0 011E8070 0191C040 02AC9030 03FD6C10 0003DA10 02023710 01032C90 0382BAD0 0043E7B0
      0043E7B0 00621460 02531E50 017A9170 01C7D9C0 02921A90 02ED8BE0 019B4E10 0356E910 00FD9D90 02835350
      02835350 01C2FAF0 01238780 01B24440 016B6660 03DED550 0018DFF0 000A5800 000F7400 0008CE00 000CA900
      000CA900 000AFD80 000F8340 000842E0 020C6390 010A5250 038F7B70 01246360 03DB2960 0036BDD0 022DE330
      022DE330 033B12A0 00A69BF0 00F5D600 008F3D00 00C8A380 00ACF240 00FA8B60 0343E760 02710A60 01498F50
      01498F50 03ED48F0 021BEC80
     
