-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 26 00:48:08 2024 UTC
-- File 20240225_134010_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-25T13:40:13.000.000.000 to 2024-02-25T13:40:13.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240225_134010_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03EB37F0 021EAC00 0311FA00 02990700 01EAC240 011FA360 039072D0 00584BB0 00746E60 024E5950 016975F0
      016975F0 01DDCF00 01332880 01AABCC0 02BFF150 00F004F0 00880680 00CC05C0 00AA0720 02FF04B0 038086E0
      038086E0 0040C590 0260A750 0150F4F0 01F88E80 008264E0 0361AB40 02D17EE0 01B9C190 03652150 00D7B1F0
      00D7B1F0 00BC6900 00E25D80 00937340 00DACAE0 02B7AF90 02F63C20 00C69110 02A5D990 01F73550 030CAFF0
      030CAFF0 028AF800 03CF8400 02284600 033C6500 02A25780 03F37C40 03056130 0343E8D0 00E21CB0 009312E0
      009312E0 02DA9B90 01B7D650 036C3D70 02DA23C0 03B73220 006CAB30 005AFEA0 013BC0F0 00D31040 00BA9860
      00BA9860 02E7D450 01943E70 015E2140 01F131E0 0309A910 008D7D90 02CBC350 01AE22F0 00BC99C0 02716A90
      02716A90 0149DFD0 03ED3030 021BA820 01167C30 019D4220 0353E330 02FA12A0 01871BF0 01449600 00F36E80
      00F36E80 00456CE0 0267DA90 015437D0 03FE2C30 02013A20 0101A730 018174A0 0341CEF0 02E12980 0391BD40
      0391BD40 032CB1F0 015D7480
     
