-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb 24 01:30:42 2024 UTC
-- File 20240223_155654_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-23T15:56:57.000.000.000 to 2024-02-23T15:56:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240223_155654_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F98AB0 03C2A7F0 0111FA00 00CC8380 00556120 013FE8D0 03A01CB0 027012E0 01481B90 03EC1650 001A1D70
      001A1D70 001713C0 001C9A20 0212D730 031BBCA0 004B3170 003754E0 022CFE90 013A81D0 03A7C130 027421A0
      027421A0 014E3170 01E929C0 011DBD20 039363B0 025AD260 02BBDDA0 00F319B0 008A9560 02CFDFD0 01A83030
      01A83030 017C2820 03C23C30 02232220 0132B330 01ABEAA0 037E1FF0 01608800 00E86600 009C5500 00D27F80
      00D27F80 00BB4040 00E6E060 02959050 01DF5870 0130F440 01A88E60 037CC950 006156F0 0028FEC0 003C81A0
      003C81A0 0222C170 0333A1C0 02AA7120 01FF49B0 0100ED60 03809BD0 0040D630 0060BD20 012871D0 01DE2490
      01DE2490 033136D0 00A9ADB0 00FD7B60 0283C6D0 01C225B0 01233760 03B2ACD0 006BFAB0 005E07E0 03388200
      03388200 01526180 01FB5140 0106F9E0 03858510 00474790 0264E450 01569670 01FDDD40 010333E0 0382AA10
      0382AA10 0221FF80 01988020 0354C030 02FEA020 0181F030 01410820 03E18C30 02114A20 0119EF30 019518A0
      019518A0 035F94F0 01782F40
     
