-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb 23 03:36:08 2024 UTC
-- File 20240222_185445_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-22T18:54:48.000.000.000 to 2024-02-22T18:54:48.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240222_185445_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00F40D70 008E0BC0 00C90E20 02AD8930 03FB4DA0 0006EB70 00059EC0 000751A0 0204F970 030685C0 0285C720
      0285C720 01C724B0 0124B6E0 03B6ED90 006D9B50 025B56F0 01BB7EC0 0166C1A0 03D5A170 023F71C0 0320C920
      0320C920 00B0ADB0 00E8FB60 029C86D0 01D2C5B0 013BA760 03D33A60 021D53A0 0113FA70 019A0740 015704E0
      015704E0 03FC8690 0002C5D0 0203A730 030274A0 00834EF0 00C2E980 0051CEA0 013C94F0 01A2DE80 0173B1C0
      0173B1C0 01CA6920 032F5DB0 02B8F360 01E48AD0 0316CFB0 029DA860 01D37C50 019D6130 02A9E8D0 01FD1CB0
      01FD1CB0 010392E0 03825B90 00437650 0262CD70 0353ABC0 02FA7E20 01874130 0144E1A0 01F348B0 02857670
      02857670 03C7CD40 02242BE0 01363E10 03AD2110 007BB190 02466950 01655DF0 01D7F300 013C0A80 00D107E0
      00D107E0 035CC200 02F2A300 038BF280 024E0BC0 03690E20 00DD8930 00B34DA0 02EAEB70 039F9EC0 025051A0
      025051A0 00BC3CB0 02711170 034999C0 02ED5520 019BFFB0 01560060 03FD0050 00038070 00024040 00036060
      00036060 0202D050 0081DC30
     
