-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb 23 02:36:25 2024 UTC
-- File 20240222_132723_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-22T13:27:26.000.000.000 to 2024-02-22T13:27:26.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240222_132723_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  019FF400 01500E00 01F80900 01040D80 01860B40 01450EE0 03E78990 00144D50 021E6BF0 03115E00 0299F100
      0299F100 03D50980 023F8D40 039025F0 02583700 03742C80 02CE3AC0 03A927A0 007DB470 00436E40 0062D960
      0062D960 0253B5D0 017A6F30 02E3AC50 00C93D30 00ADA3A0 02FB7270 0386CB40 0245AEE0 01677990 03D4C550
      03D4C550 003EA7F0 0021F400 00310E00 0014C480 000F5360 0208FAD0 010C87B0 018AC460 034FA650 00E87570
      00E87570 009C4FC0 00D26820 02BB5C30 03E6F220 000AC590 0307D3A0 00843A70 00C62740 00A534E0 02F7AE90
      02F7AE90 018C79D0 034A4530 02EF67A0 0198D470 0154BE40 02FF70B0 03C06470 02205640 03307D60 00A843D0
      00A843D0 02FC6230 03825320 00437AB0 0062C7E0 0253A410 017A7610 03E3A680 01093AE0 038DA790 004B7450
      004B7450 026ECE70 0359A940 02F57DE0 018FC310 03482290 00EC33D0 029A2A30 03EB9F90 020F2820 0108BC30
      0108BC30 018CE220 034A9330 02EFDAA0 019837F0 01542C00 01FE3A00 01012700 0181B480 00A0B760 03787660
      03787660 00C44D50 02A66BF0
     
