-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb 23 02:27:19 2024 UTC
-- File 20240222_132012_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-22T13:20:15.000.000.000 to 2024-02-22T13:20:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240222_132012_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  038C4B10 004A6E90 026F59D0 0158F530 01F48FA0 030EC870 0289AC40 03CD7A60 002BC750 023E24F0 03213680
      03213680 0158D6E0 03FA5EC0 020771A0 0104C970 0186ADC0 0145FB20 03E706B0 021485E0 011EC710 0391A490
      0391A490 005976D0 013AE6D0 01D3CAD0 033A2FB0 02A73860 01F4A450 030EF670 02898D40 03CD4BE0 002BEE10
      002BEE10 023E1910 01211590 03D8CFA0 001A5430 00177E20 021CC130 0312A1A0 009BF170 00D609C0 00BD0D20
      00BD0D20 02E38BB0 03924E60 005B6950 013B6EF0 00D36CC0 00BADAA0 02E7B7F0 03946C00 025E5A00 03717700
      03717700 02C9CC80 03AD2AC0 027BBFA0 01466070 00F2A820 0145FE10 03E70110 00148190 021EC150 0111A1F0
      0111A1F0 01997100 0155C980 01FF2D40 0100BBE0 0380E610 02204A80 019837E0 03542C10 00FE3A10 02812710
      02812710 01C1B490 03216ED0 00B1D9B0 00E93560 029DAFD0 01D37830 029D6210 02E9E980 039D1D40 025393E0
      025393E0 017A5A10 03C77710 0024CC90 0236AAD0 012DFFB0 01BB0060 03668050 006AE030 022FC810 01382C10
      01382C10 03A43A10 00762710
     
