-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb 23 02:24:52 2024 UTC
-- File 20240222_131847_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-22T13:18:50.000.000.000 to 2024-02-22T13:18:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240222_131847_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  026B5A90 015EF7D0 03F18C30 02094A20 010DEF30 018B18A0 01A74A70 00BA77A0 02E74C70 0394EA40 025E9F60
      025E9F60 0171D0D0 03C938B0 022DA4E0 013B7690 03A6CDD0 0075AB30 0227BF50 009A3070 00D72840 00BCBC60
      00BCBC60 02E2E250 01939370 015A5AC0 01F777A0 030CCC70 028AAA40 03CFFF60 02140060 028F0020 01C88030
      01C88030 012CC020 03BAA030 0267F020 01540830 01FE0C20 03010A30 02818F20 01C148B0 0290F670 01EC46A0
      01EC46A0 031A65F0 02975700 03DCFC80 023282C0 032BC3A0 00BE2270 00E13340 0091AAE0 02D97F90 02DAE020
      02DAE020 00DBC810 02B62C10 01ED3A10 031BA710 00967490 02DD4ED0 01B3E9B0 016A1D60 03DF13D0 00309A30
      00309A30 02146B90 028F2F20 01C8B8B0 012CE4E0 03BA9690 0067DDD0 02543330 037E2AA0 00C13FF0 00A1A000
      00A1A000 00F17000 0044E400 00334B00 002AEE80 003F99C0 00205520 02307FB0 03284060 00BC6050 02E25070
      02E25070 03937840 025AC460 02BBD320 00F31D50 028A93F0 03CFDA00 02283700 033C2C80 02A23AC0 03F327A0
      03F327A0 000AB470 000FEE40
     
