-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb 23 00:28:23 2024 UTC
-- File 20240222_101136_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-22T10:11:39.000.000.000 to 2024-02-22T10:11:39.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240222_101136_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  015E2C10 03F13A10 0009A710 0306BA40 0342F3B0 0371C530 036493D0 006B6D10 025EDB90 0171B650 03C96D70
      03C96D70 022DDBC0 033B3620 00A6AD30 00F5FBA0 028F0670 03C88540 031663F0 014EA900 01E9FD80 011D0340
      011D0340 019382E0 035A4390 00F76250 028CD370 03CABAC0 022FE7A0 01381470 00D20F20 015D8450 03F34670
      03F34670 020AE540 030F97E0 00885C10 02CC7210 01AA4B10 037F6E90 00C0D9D0 02A0B530 03F877D0 00022610
      00022610 02033510 0102AF90 0383F850 00420470 00630640 00528560 027BC7D0 01462430 01E53620 018BD690
      018BD690 03A71EE0 00749190 024ED950 0169B5F0 01DD6F00 0133D880 01AA34C0 017F2EA0 03C0B9F0 0220E500
      0220E500 01984BC0 02AA3710 01FF2C90 0300BAD0 0080E7B0 00C09460 02A0DE50 01F0B170 0108E9C0 018C9D20
      018C9D20 034AD3B0 0377DD30 036619D0 00D51530 00BF9FA0 02E05070 03907840 02584460 01746650 03CE5570
      03CE5570 02297FC0 033DC020 00519010 033CAC00 02A2FA00 03F38700 020A4480 030F66C0 0288D5A0 01CCBF70
      01CCBF70 012AE0C0 01BF90A0
     
