-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Feb 21 00:04:33 2024 UTC
-- File 20240220_045253_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-20T04:52:56.000.000.000 to 2024-02-20T04:52:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240220_045253_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02ECEDF0 039A9B00 0257D680 037C3DC0 02C22320 01A332B0 0172ABE0 03CBFE10 002E0110 031C80C0 03496050
      03496050 00EDD070 009B3840 00D6A460 02BDF650 01E30D70 01128BC0 019BCE20 03562930 02FD3DA0 00C1D1B0
      00C1D1B0 02509CB0 0378D2E0 00C4BB90 02A6E650 01F59570 010F5FC0 0188F020 034C8830 02EACC20 019FAA30
      019FAA30 02A83F90 02FE1020 01811830 01419420 03E15E30 0211F120 011909B0 01958D60 035F4BD0 00F0EE30
      00F0EE30 00889920 01666AD0 01EAAFD0 031FF830 02900420 01D80630 01340520 03AE07B0 02790460 01458650
      01458650 03E74570 0214E7C0 038F4A10 02247780 03364C40 02AD6A60 01FBDF50 030630F0 02852880 03C7BCC0
      03C7BCC0 022462A0 013653F0 01AD7A00 00BDE380 00718920 02494DB0 036DEB60 00DB1ED0 02B691B0 03EDD960
      03EDD960 001B35D0 0216AF30 031DF8A0 009304F0 006D4340 022DF170 033B09C0 02A68D20 01F5CBB0 010F2E60
      010F2E60 0388B950 004CE5F0 006A9700 005FDC80 007032C0 022415D0 009B0F90 02D68850 01BDCC70 01632A40
      01632A40 01D2BF60 033BE0D0
     
