-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Feb 20 03:29:42 2024 UTC
-- File 20240220_031129_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-20T03:11:32.000.000.000 to 2024-02-20T03:11:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240220_031129_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0199DFE0 03553010 00FFA810 02807C10 01C04210 03903180 012C14A0 01DD0F70 0099C460 036A9320 00DFDAB0
      00DFDAB0 00B037E0 02E82C10 019C3A10 03522710 00FB3490 0286AED0 01C5F9B0 01270560 03DA43E0 021BB100
      021BB100 03166980 029D5D40 03D3F3E0 003A0A10 02270F10 01348890 03AECCD0 0079AAB0 00457FE0 0333E000
      0333E000 01550800 01FF8C00 01004A00 01806F00 01405880 01E074C0 01104EA0 039869F0 02545D00 037E7380
      037E7380 0160A520 01E87BD0 031C4630 02926520 01DB57B0 0136FC60 03AD8250 007B4370 0046E2C0 006593A0
      006593A0 02575A70 01BE7BA0 01B0A330 0168F2A0 03DC8BF0 0232CE00 032BA900 02BE7D80 03E14340 0211E2E0
      0211E2E0 01191390 03959A50 002FABB0 021C3F30 031220A0 009B30F0 00D6A880 00BDFCC0 00E302A0 029283F0
      029283F0 03DBC200 02362300 032D3280 015DD5E0 03F99F80 02055040 0307F860 00840450 02C60670 03A50540
      03A50540 027787E0 014C4410 03EA6610 001F5510 03087FC0 03462010 00E53010 0297A810 01DC7C10 03324210
      03324210 00AB6310 02FED290
     
