-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 19 00:33:35 2024 UTC
-- File 20240218_201028_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-18T20:10:31.000.000.000 to 2024-02-18T20:10:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240218_201028_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  030BE340 028E12E0 01C91B90 032D9650 00BB5D70 00E6F3C0 00958A20 02DF4F30 03B0E8A0 00689CF0 005CD280
      005CD280 0072BBC0 004BE620 026E1530 03591FA0 007AC830 0223D610 01323D10 03AB2390 007EB250 0241EB70
      0241EB70 03611EC0 02D191A0 01B95970 0165F5C0 01D70F20 019E4450 01A8B330 017CEAA0 03C29FF0 0223D000
      0223D000 03323800 02AB2400 03FEB600 0201ED00 03011B80 02819640 03E0AEB0 03087CF0 028C4280 03CA63C0
      03CA63C0 022F5220 0138FB30 01A486A0 0376C5F0 02CDA700 03AB7480 027ECEC0 03A0D4D0 00385F50 022470F0
      022470F0 03364880 02AD6CC0 03FBDAA0 000637F0 00052C00 0007BA00 00046700 00065480 0002BF60 0301F060
      0301F060 00810850 02C18C70 03A14A40 0271EF60 014918D0 03ED94B0 021B5EE0 0116F190 039D8950 0029A6F0
      0029A6F0 001EBAC0 0011E7A0 02191470 03159E40 029F5160 01D0F9D0 03388530 02A4C7A0 01F6A470 010DF640
      010DF640 02C586B0 03D3A2F0 023A7380 03274A40 02B4EF60 01EE98D0 0319D4B0 02953EE0 01DFA190 03307150
      03307150 00A849F0 007E3680
     
