-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 19 00:15:00 2024 UTC
-- File 20240218_105227_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-18T10:52:30.000.000.000 to 2024-02-18T10:52:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240218_105227_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DC6CB0 00B25AE0 02EB7790 019ECC50 0351AA70 02F97F40 0385C0E0 00472090 0264B0D0 0156E8B0 01FD9CE0
      01FD9CE0 0381A940 0320BEF0 02B0E180 03E89140 021CD9E0 0112B510 039BEF90 00561850 027D1470 03439E40
      03439E40 02E25160 02C9BCE0 02D6B140 03BDE9E0 00631D10 02529390 017BDA50 03C63770 02252CC0 0337BAA0
      0337BAA0 00AC67F0 00FA5400 0043BF00 00313040 0029A860 023D7C50 0123C270 01B22340 016B32E0 03DEAB90
      03DEAB90 0031FE50 02290170 033D81C0 0351A090 027CB860 0142E450 03E39670 02125D40 031B73E0 0096CA10
      0096CA10 02DDAF10 01B37890 036AC4D0 00DFA6B0 02583AF0 01BA13C0 01671A20 03D49730 023EDCA0 0121B2F0
      0121B2F0 01B16B80 0169DE40 01DD3160 0333A9D0 00AA7D30 027FA1D0 00A03890 02F024D0 018836B0 014C2DE0
      014C2DE0 03EA3B10 001F2690 0210B5D0 0118EF30 019498A0 035ED4F0 0178DF40 02E25870 03937440 025ACE60
      025ACE60 0177A950 03CC7DF0 022A4300 033F6280 02A0D3C0 03F0BA20 0008E730 02064A50 0082B7B0 00C3EC60
      00C3EC60 02A21A50 01F31770
     
