-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb 16 03:31:01 2024 UTC
-- File 20240216_031307_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-16T03:13:10.000.000.000 to 2024-02-16T03:13:10.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240216_031307_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00A00A20 02F00F30 038808A0 004C0CF0 006A0A80 005F0FC0 00708820 01246610 03DB2A80 011B5FE0 03CB7800
      03CB7800 022EC400 0339A600 02A57500 03F7CF80 020C2840 030A3C60 008F2250 02C8B370 03ACEAC0 033D4FD0
      033D4FD0 0051F410 02790E10 01458910 03E74D90 0014EB50 021E9EF0 0311D180 02993940 03D5A5E0 003F7710
      003F7710 03106640 034C2AB0 02EA3FE0 019F2010 0350B010 00F8E810 02849C10 01C6D210 0325BB10 00B76690
      00B76690 02ECD5D0 00CD5F90 0355F820 00FF0430 00808620 02C0C530 03A0A7A0 0070F470 00488E40 006CC960
      006CC960 025AADD0 0177FB30 02E60350 00CA8170 00AFC1C0 00F82120 028431B0 03C62960 00253DD0 0237A330
      0237A330 032C72A0 00BA4BF0 00E76E00 004A6C80 0037AD60 022C7BD0 013A4630 01A76520 0374D7B0 02CEBC60
      02CEBC60 01A9E250 037D1370 02C39AC0 03A257A0 0039BE30 0212B090 011BE8D0 03961CB0 025D12E0 01739B90
      01739B90 03CA5650 002F7D70 0038C3C0 0024A220 0236F330 0396C550 002ED3F0 0039BA00 00256700 0037D480
      0037D480 002C3EC0 003A21A0
     
