-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 12:13:52 2024 UTC
-- File 20240211_180508_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-11T18:05:11.000.000.000 to 2024-02-11T18:05:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240211_180508_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01DFA940 01307DE0 03A84310 007C6290 024253D0 01637A30 01D2C720 033BA4B0 02A676E0 01F54D90 030FEB50
      030FEB50 00881EF0 00CC1180 00AA1940 00FF15E0 02809F10 02E06840 03C82E30 022C3920 013A25B0 01A73760
      01A73760 0374ACD0 00CEFAB0 00A987E0 02FD4410 0183E610 03421510 02718FC0 03A4A410 0076F610 024D8D10
      024D8D10 016B4B90 03DEEE50 00319970 002955C0 003DFF20 022300B0 033280E0 0255E040 03BF8830 02604C20
      02604C20 01506A30 01F85F20 030470B0 028648E0 01C56C90 0327DAD0 00B437B0 00EE2C60 034C9D20 007569D0
      007569D0 024FDD30 036833A0 00DC2A70 00B23F40 00EB20E0 029EB090 01D1E8D0 03391CB0 02A592E0 02FBADC0
      02FBADC0 03C33D90 0022A350 0233F2F0 032A0B80 02BF0E40 03E08960 0010CDD0 0218AB30 0314FEA0 009E81F0
      009E81F0 0068E080 002E4860 02396C50 0125DA70 01B73740 016CACE0 03DAFA90 003787D0 022C4430 033A6620
      033A6620 00A75530 027A7FD0 00A3A010 02F27010 018B4810 034EEC10 00E99A10 029D5710 01D3FC90 033A02D0
      033A02D0 00A703B0 00F48260
     
