-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 11:26:46 2024 UTC
-- File 20240211_002559_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-11T00:26:02.000.000.000 to 2024-02-11T00:26:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240211_002559_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  011D31A0 0393A970 025A7DC0 03774320 00CCE2B0 00AA93E0 02FFDA10 01803710 03402C90 02701D60 02A409E0
      02A409E0 02FB0680 038685C0 0245C720 016724B0 01D4B6E0 033EED90 00A19B50 02F156F0 0389FD80 024D0340
      024D0340 03B5C170 013790E0 03AC5890 007A74D0 02474EB0 0364E9E0 00D69D10 02BDD390 01E33A50 0312A770
      0312A770 029BF4C0 03EB0750 000F4270 0008E340 000C92E0 020ADB90 010FB650 03886D70 024C5BC0 036A7620
      036A7620 00DF4D30 00B0EBA0 01744F30 02E73450 0194AE70 015EF940 01F185E0 03094710 008DE490 02CB16D0
      02CB16D0 01AE9DB0 0179D360 03C53AD0 0013D3D0 010D1D10 038B9390 004E5A50 02697770 035DCCC0 02F32AA0
      02F32AA0 018ABFF0 014FE000 01E81000 011C1800 00C90A00 0056C780 007DA440 00437660 0262CD50 0153ABF0
      0153ABF0 01FA7E00 01074100 0184E180 01469140 01E5D9E0 038B9A80 01272BE0 03B4BE10 006EE110 02599190
      02599190 01755950 03CFF5F0 02280F00 033C0880 02A20CC0 03F30AA0 000547F0 0003F200 00020B00 00030E80
      00030E80 000289C0 0003CD20
     
