-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 09:55:34 2024 UTC
-- File 20240209_140102_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T14:01:05.000.000.000 to 2024-02-09T14:01:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_140102_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  019D6230 0153D320 03FA3AB0 020727E0 0104B410 0386EE10 00459910 02675590 02AA7FA0 00FFA030 02403810
      02403810 02B01200 03E81B00 021C1680 03121DC0 029B1320 01D69AB0 013DD7E0 03A33C10 0072A210 024BF310
      024BF310 02B70540 03F643F0 020D6200 030BD300 028E3A80 03C927C0 022DB420 013B6E30 01A6D920 0375B5B0
      0375B5B0 02CF6F60 02D46C60 02DF2D20 01B0BBB0 0168E660 03DC9550 0032DFF0 002BB000 003E6800 00215C00
      00215C00 0031F200 00290B00 001EC740 0208D270 030CBB40 028AE6E0 01CF9590 03285F50 00BC70F0 00E24880
      00E24880 00936CC0 00DADAA0 02B7B7F0 01F63600 00869680 00C5DDC0 00A73320 02F4AAB0 038EFFE0 00498010
      00498010 026D4010 015BE010 03F61010 000D1810 0305CA00 01439780 01E25C40 01137260 039ACB50 0057AEF0
      0057AEF0 007C7980 00424540 006367E0 0252D410 017BBE10 03E33080 01095460 038DFE50 004B0170 006E81C0
      006E81C0 0059C120 027521B0 034FB160 00E869D0 029C5D30 03D273A0 001DA530 0209BBD0 010D6630 018BD520
      018BD520 034E3FB0 02E92060
     
