-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 08:29:13 2024 UTC
-- File 20240209_082048_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T08:20:51.000.000.000 to 2024-02-09T08:20:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_082048_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0204D540 0306BFE0 0085E010 02C71010 01A49810 0376D410 0266DF00 0355B080 02FF68C0 0380DCA0 0040B2F0
      0040B2F0 0060EB80 00509E40 0078D160 0244B9D0 0166E530 02EACBD0 00CFD710 02A83C90 01FC22D0 030233B0
      030233B0 02832A60 01C2BF50 0323E0F0 02B21080 03EB18C0 021E94A0 0088EF70 00664C60 02556A50 017FDF70
      017FDF70 01C030C0 012028A0 03B03CF0 02682280 035C33C0 02F22A20 018B3F30 02A75050 00FA7C30 00874220
      00874220 02C4E330 03A692A0 0075DBF0 004F3600 0068AD00 005CFB80 00728640 004BC560 033713E0 02564D00
      02564D00 037D6B80 02C3DE40 03A23160 007329D0 024ABD30 036FE3A0 00D81270 00B41B40 00EE16E0 034C8EC0
      034C8EC0 037564D0 00CFD6B0 00A83DE0 02FC2310 01823290 03432BD0 00E2BE30 0093E120 02DA11B0 03B71960
      03B71960 02364AE0 0296B7C0 03DDEC20 00331A30 002A9720 023FDCB0 032032E0 00B02B90 02E83E50 019C2170
      019C2170 015231C0 02FD9490 02C1AF60 01A178D0 0371C4B0 02C926E0 01ADB590 037B6F50 00C6D8F0 00A5B480
      00A5B480 00F76EC0 008CD9A0
     
