-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 08:02:44 2024 UTC
-- File 20240209_053248_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T05:32:51.000.000.000 to 2024-02-09T05:32:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_053248_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00283BB0 003C2660 02223550 01332FF0 00D55C00 005FF900 00700580 00480740 006C04E0 025A0690 017705D0
      017705D0 03CC8730 022AC4A0 013FA6F0 01A07580 00B827A0 01721A30 01CB1720 032E9CB0 02B9D2E0 01E53B90
      01E53B90 0317A650 009C7570 00D24FC0 00BB6820 02E6DC30 03CAD910 0217DAC0 031C37A0 00922C70 00DB3A40
      00DB3A40 00B6A760 02EDF4D0 019B0EB0 015689E0 03FDCD10 00032B90 03015F20 0040F850 02608470 0350C640
      0350C640 02F8A560 0184F7D0 03468C30 02E5CA20 01972F30 015CB8A0 03F2E4F0 0105CB40 02C39770 03A25CC0
      03A25CC0 027372A0 014ACBF0 01EFAE00 01187900 01944580 015E6740 01F154E0 0309FE90 024680E0 02B2E040
      02B2E040 03EB9060 001E5850 02117470 0319CE40 02952960 01DFBDD0 03306330 02A852A0 01FC7BF0 00812300
      00812300 0060D940 0050B5E0 0278EF10 01449890 03E6D4D0 0015BEB0 001F61E0 0210D110 0118B990 0394E550
      0394E550 002F4BF0 001C7700 00124C80 001B6AC0 0016DFA0 021DB070 03136840 029ADC60 01D7B250 033C6B70
      033C6B70 02A25EC0 03F9B8D0
     
