-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 07:53:25 2024 UTC
-- File 20240209_050851_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T05:08:54.000.000.000 to 2024-02-09T05:08:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_050851_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03AEA7A0 0079F470 00450E40 00678960 02544DD0 00BF3590 037057A0 00643E30 022B1090 013E98D0 03A1D4B0
      03A1D4B0 02713EE0 0149A190 03ED7150 001BC9F0 00162D00 001D3B80 0013A640 020D3AB0 0385D3F0 02473A00
      02473A00 0364A700 02D6F480 03BD8EC0 026349A0 0152ED70 01FB9BC0 01065620 03857D30 0323E1D0 00590890
      00590890 02758CD0 014F4AB0 01E8EFE0 031C9810 0092D410 02DBBE10 01B66110 036D5190 00DBF950 015B02F0
      015B02F0 00FB41C0 0086E120 02C591B0 03A75960 0074F5D0 024E8F30 0369C8A0 00DD2CF0 00B3BA80 00EA67C0
      00EA67C0 024FAA10 02B43F80 03EE2040 02193060 0115A850 039F7C70 0250C240 0378A360 00C4F2D0 02A68BB0
      02A68BB0 03F5CE60 020794A0 00822F70 00C338C0 00A2A4A0 02F3F6F0 038A0D80 024F0B40 03688EE0 00DCC990
      00DCC990 02B2AD50 01EBFBF0 008F0300 00644140 005661E0 027D5110 0143F990 03E20550 001307F0 001A8400
      001A8400 0017C600 001C2500 00123780 000D9620 0105AE90 038779D0 0044C530 0066A7A0 0255F470 037F0E40
      037F0E40 02C08960 01A0CDD0
     
